Customers adopting Design Compiler NXT report significant reduction in runtimes together with improvements in power, performance and area (PPA) New advanced optimizations, such as concurrent clock and ...

Design Compiler NXT incorporates innovative and efficient optimization engines delivering 2X faster runtime and cloud-ready distributed synthesis that boosts runtime further Advanced-node support, ...

PARIS — EDA and IP vendor Synopsys Inc. (Mountain View, Calif.) said it has extended its topographical technology in Design Compiler 2010 to produce physical guidance to its place-and-route solution, ...

Oticon has widely deployed Design Compiler Graphical for implementation of its hearing solutions ICs Multi-corner multi-mode (MCMM) synthesis results in lower leakage and faster convergence Congestion ...

ML-driven implementation in IC Compiler II and Fusion Compiler enables Samsung to achieve up to five percent higher frequency and five percent lower power Predictive ML technologies accelerate ...

AMD deploys Synopsys' Fusion Compiler RTL-to-GDSII product for the development of its next-generation processor products Unique, single-data-model architecture and unified, full-flow optimization ...

Collaboration on AI-Driven Design Flows for Optimization and Productivity, Advancements in Photonic IC Integration, Plus Broad IP Development on TSMC 2nm Technology "The advancements in Synopsys' ...

Companies Strengthen Collaboration with Successful Tape Out of HBM Customer Design, Certified EDA Flows, and PPA-Optimized IP on Samsung's Advanced Technologies "The adoption of Edge AI applications ...

Synopsys' Design Compiler 2010 accounts for the challenges of modern physical IC design, offering floor plan exploration from within the synthesis environment. It also delivers physical guidance to IC ...

AMD deploys Synopsys' Fusion Compiler RTL-to-GDSII product for the development of its next-generation processor products Unique, single-data-model architecture and unified, full-flow optimization ...