Design-Reuse

Averant Announces AMBA AXI Protocol Checker

Alameda, Calif. – June 2, 2005 – Averant Inc., a leading provider of advanced design verification technology for RTL designers, today announced the release of the SolidPC™ protocol checker for ...
Design-Reuse

Synopsys Enhances DesignWare Synthesizable IP for AMBA 2 and AMBA 3 AXI Protocols

MOUNTAIN VIEW, Calif. -- April 25, 2007-- Synopsys, Inc. (Nasdaq: SNPS - News), a world leader in semiconductor design software, today announced the 2007.04a release of DesignWare® synthesizable ...
EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...
EDN

Verification IP on AMBA:APB,AHB,AXI

The Perfectus VIP for AXI, AHB, APB provides an efficient algorithm to verify the AMBA based designs by giving the advance techniques including the support for System Verilog assertions. AXI ...
Electronic Design

Formal Techniques for Protocol Verification: A Case Study On Verifying the ARM ACE Protocol

More processors on SoCs means more sophisticated cache control. This article describes formal techniques for verifying cache coherency for the ARM AMBA AXI Coherency Extensions (ACE) protocol. Fig 1.